Toshiba Corp. announced this week that it has made advancements in its development of a gate stack and interlayer with high carrier mobility that can be applied to metal-insulator-semiconductor ...

Imec has demo-ed a silicon-passivated germanium nMOS gate stack with dramatically reduced interface defect density (DIT) reaching the same level as a Si gate stack and with high mobility and reduced ...

Imec reports improved performance for both Ge-based n-type FinFETs and Ge-based p-type gate-all-around (GAA) devices. For Ge n-type FinFETs, pre-gate stack process optimization dramatically improved ...

Researchers unveil a roadmap for 2D transistor gate stack design, marking a key step toward ultra-efficient chips that could replace silicon technology. For decades, silicon-based CMOS technology has ...

Applied Materials Inc. said today that Foundry giant Taiwan Semiconductor Manufacturing Co. plans to use Applied's transistor fabrication technology for its 65nm process, extending oxynitride gate ...

To allow 32-nm generation high-k metal gate stacks using a single metal, instead of the two different metals required previously for CMOS, semiconductor manufacturing equipment maker ASM America Inc, ...

Seoul National University’s College of Engineering announced that a research team led by Professor Chul-Ho Lee from the Department of Electrical and Computer Engineering has outlined a comprehensive ...